Datasheet

Table Of Contents
© 2006 Microchip Technology Inc. DS41159E-page 217
PIC18FXX8
REGISTER 19-26: RXMnSIDL: RECEIVE ACCEPTANCE MASK n STANDARD IDENTIFIER MASK,
LOW BYTE REGISTERS
REGISTER 19-27: RXMnEIDH: RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK,
HIGH BYTE REGISTERS
REGISTER 19-28: RXMnEIDL: RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK,
LOW BYTE REGISTERS
R/W-x R/W-x R/W-x U-0 U-0 U-0 R/W-x R/W-x
SID2 SID1 SID0 —EID17EID16
bit 7 bit 0
bit 7-5 SID2:SID0: Standard Identifier Mask bits or Extended Identifier Mask bits EID20:EID18
bit 4-2 Unimplemented: Read as ‘0
bit 1-0 EID17:EID16: Extended Identifier Mask bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8
bit 7 bit 0
bit 7-0 EID15:EID8: Extended Identifier Mask bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0
bit 7 bit 0
bit 7-0 EID7:EID0: Extended Identifier Mask bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown