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PIC18F2515/2610/4515/4610

The PIC18F2515/2610/4515/4610 family Rev. B5 parts

you have received conform functionally to the Device

Data Sheet (DS39636C), except for the anomalies

described below. Any Data Sheet Clarification issues

related to the PIC18F2515/2610/4515/4610 family will

be reported in a separate Data Sheet errata. Please

check the Microchip web site for any existing issues.

The following silicon errata apply only to

PIC18F2515/2610/4515/4610 family devices with

these Device/Revision IDs:

All of the issues listed here will be addressed in future

revisions of the PIC18F2515/2610/4515/4610 family

silicon.

1. Module: MSSP

In SPI Slave mode, with slave select enabled

(SSPM<3:0> = 0b0100), the minimum time

between the falling edge of the SS pin and the first

SCK edge is greater than specified in parameter 70

in Table 25-16. The updated specification is shown

in bold in Table 1.

The minimum time between the SS

pin low and an

SSPBUF write is also 3 T

CY. If the falling edge of

the SS

pin occurs greater than 3 TCY before the

first SCK edge or loading SSPBUF, the peripheral

will function correctly. Also, if SSPBUF is written

prior to the SS

pin going low, the peripheral will

function correctly.

Work around

None.

Date Codes that pertain to this issue:

All engineering and production devices.

TABLE 1: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)

Part Number Device ID Revision ID

PIC18F2515 0000 1100 111 0 0111

PIC18F2610 0000 1100 101 0 0111

PIC18F4515 0000 1100 011 0 0111

PIC18F4610 0000 1100 001 0 0111

The Device IDs (DEVID1 and DEVID2) are located at

addresses 3FFFFEh:3FFFFFh in the device’s

configuration space. They are shown in binary in the

format “DEVID2 DEVID1”.

Param

No.

Symbol Characteristic Min Max Units Conditions

70 T

SSL2SCH,

SSL2SCL

↓ to SCK↓ or SCK↑ Input 3 TCY —ns

PIC18F2515/2610/4515/4610 Rev. B5 Silicon Errata

Summary of content (8 pages)

PAGE 1
PIC18F2515/2610/4515/4610 PIC18F2515/2610/4515/4610 Rev. B5 Silicon Errata The PIC18F2515/2610/4515/4610 family Rev. B5 parts you have received conform functionally to the Device Data Sheet (DS39636C), except for the anomalies described below. Any Data Sheet Clarification issues related to the PIC18F2515/2610/4515/4610 family will be reported in a separate Data Sheet errata. Please check the Microchip web site for any existing issues.
PAGE 2
PIC18F2515/2610/4515/4610 FAMILY 2. Module: MSSP With MSSP in SPI Master mode, FOSC/64 or Timer2/2 clock rate and CKE = 0, a write collision may occur if SSPBUF is loaded immediately after the transfer is complete. A delay may be required after the MSSP Interrupt Flag bit, SSPIF, is set or the Buffer Full bit, BF, is set and before writing SSPBUF. If the delay is insufficiently short, a write collision may occur as indicated by the WCOL bit being set. Work around 4.
PAGE 3
PIC18F2515/2610/4515/4610 FAMILY REGISTER 17-3: R/W-0 BAUDCON: BAUD RATE CONTROL REGISTER R-1 ABDOVF RCIDL R/W-0 RXDTP R/W-0 TXCKP R/W-0 U-0 R/W-0 R/W-0 BRG16 — WUE ABDEN bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 ABDOVF: Auto-Baud Acquisition Rollover Status bit 1 = A BRG rollover has occurred during Auto-Baud Rate Detect mode (must be cleared in software) 0
PAGE 4
PIC18F2515/2610/4515/4610 FAMILY 5. Module: Master Synchronous Serial Port (MSSP) When configured for I2C™ slave reception, the MSSP module may not receive the correct data, in extremely rare cases. This occurs only if the Serial Receive/Transmit Buffer Register (SSPBUF) is not read within a window after the SSPIF interrupt (PIR1<3>) has occurred. 6.
PAGE 5
PIC18F2515/2610/4515/4610 FAMILY REVISION HISTORY Rev A Document (10/2008) Initial release of this errata. Includes silicon issues 12 (MSSP), 3 (Enhanced Capture/Compare/PWM – ECCP), 4 (Enhanced Universal Synchronous Receiver Transmitter – EUSART), 5 (Master Synchronous Serial Port – MSSP) and 6 (Enhanced Universal Synchronous Receiver Transmitter – EUSART). © 2008 Microchip Technology Inc.
PAGE 7
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 8
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