Datasheet

© 2009 Microchip Technology Inc. DS39636D-page 249
PIC18F2X1X/4X1X
REGISTER 22-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 22-2: SUMMARY OF WATCHDOG TIMER REGISTERS
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
— — — — — — —SWDTEN
(1)
bit 7 bit 0
bit 7-1 Unimplemented: Read as ‘0’
bit 0 SWDTEN: Software Controlled Watchdog Timer Enable bit
(1)
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
Legend:
R = Readable bit W = Writable bit
U = Unimplemented bit, read as ‘0’ -n = Value at POR
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
RCON
IPEN SBOREN
(1)
— RI TO PD POR BOR 50
WDTCON — — — — — — —SWDTEN
(2)
52
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
Note 1: The SBOREN bit is only available when the BOREN1:BOREN0 Configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
2: This bit has no effect if the Configuration bit, WDTEN, is enabled.