Information

 2009-2013 Microchip Technology Inc. DS80000435K-page 9
PIC18F46J11
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS39932D):
1. Module: Special Features of the CPU
On the 32K Flash devices (PIC18F45J11,
PIC18F25J11), it is necessary to write WPFP5
(CONFIG4L<5>) with ‘0’ to maintain proper
operation of the write-protect feature.
On the 16K Flash devices (PIC18F44J11,
PIC18F24J11), it is necessary to write WPFP5
and WPFP4 (CONFIG4L<5:4>) with ‘00’ to
maintain proper operation of the write-protect
feature.
At the time of this writing, MPLAB
®
tools may
incorrectly maintain the WPFP5/WPFP4 bits as
‘1’. To force MPLAB to write the Configuration bits
with the corrected values, refer to Code
Examples 1 and 2.
EXAMPLE 1: C18
EXAMPLE 2: MPASM™
Note: Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
// 32K Flash Devices (PIC18F45J11, PIC18F25J11):
#pragma romdata config_section = 0x7FFE
const rom unsigned char config4l = 0xC0;
#pragma code
// 16K Flash Devices (PIC18F44J11, PIC18F24J11):
#pragma romdata config_section = 0x3FFE
const rom unsigned char config4l = 0xC0;
#pragma code
; 32K Flash Devices (PIC18F45J11, PIC18F25J11)
ORG 0x7FFE
config4l_and_4h db 0xC0, 0xF0
; 16K Flash Devices (PIC18F44J11, PIC18F24J11)
ORG 0x3FFE
config4l_and_4h db 0xC0, 0xF0