Information

© 2009 Microchip Technology Inc. DS80267C-page 1
PIC18F2480/2580/4480/4580
Clarifications/Corrections to the Data
Sheet
In the PIC18F2480/2580/4480/4580 Device Data
Sheet (DS39637C), the following clarifications and cor-
rections should be noted. Any silicon issues related to
this device will reported in a separate silicon errata.
Please check the Microchip web site for any existing
issues.
1. Module: Enhanced Capture/Compare
PWM (ECCP1)
The following note has been added to the end of
Section 16.4.6 “Programmable Dead-Band
Delay”.
2. Module: Master Synchronous Serial Port
(MSSP) – Serial Peripheral
Interface (SPI)
The following note has been added to the end of
Section 17.3.3 “Enabling SPI I/O”.
Note: If the dead-band delay value is increased
after the dead-band time has elapsed, that
new value takes effect immediately. This
happens even if the PWM pulse is high
and can appear to be a glitch.
Dead-band values must be changed
during the dead-band time or before
ECCP is active.
Note: When the module is enabled and in
Master mode (CKE, SSPSTAT<6> = 1), a
small glitch of approximately half a T
CY
may be seen on the SCK pin. To resolve
this, keep the SCK pin as an input while
setting SPEN. Then, configure the SCK
pin as an output (TRISC<3> = 0).
PIC18F2480/2580/4480/4580 Data Sheet Errata