Information

PIC18FXX8
DS80134H-page 6 © 2006 Microchip Technology Inc.
REVISION HISTORY
Rev A Document (7/2002)
First revision of this document, silicon issues 1 (ECCP),
2 (I/O – Parallel Slave Port) and 3 (Core – Program
Memory Space).
Rev B Document (11/2002)
Added silicon issues 4, 5, 6 and 7 (Core – Program
Memory Space and Data EEPROM).
Rev C Document (03/2003)
Added silicon issue 7 (A/D (External Voltage Refer-
ence) and Comparator Voltage Reference) and data
sheet clarification issue 1 (A/D – VREF+ and VREF-
References).
Rev D Document (03/2004)
Added silicon issue 8 (CAN), 9 (MSSP – All I
2
C and SPI
Modes) and 10 (MSSP – SPI, Slave Mode). Added
data sheet clarification issues 2 (External Clock Timing
Requirements – Table 27-6), 3 (A/D Converter Charac-
teristics – Table 27-23) and 4 (Comparator Voltage
Reference Module).
Rev E Document (09/2004)
Added silicon issue 11 (CAN).
Rev F Document (11/2004)
Updated silicon issue 11 (CAN) and removed all Data
Sheet Clarification issues.
Rev G Document (05/2005)
Added silicon issue 12 (Reset).
Rev H Document (08/2006)
Added silicon issue 13 (CAN).