Information

PIC18F2458/2553/4458/4553

7. Module: MSSP (SPI Slave)

If configured in SPI Slave mode, the MSSP may not

successfully recognize data packets generated by an

external master processor. This applies to all SPI

Slave modes (CKE/CKP = 1 or 0), whether or not

slave select is enabled (SSPM3:SSPM0 = 010x).

Work around

Insert a series resistor between the SPI master

Serial Data Out (SDO) and the corresponding SPI

slave Serial Data In (SDI) input line of the

microcontroller. The required value for the resistor

varies with the application system’s characteristics

and the process variations between the

microcontrollers.

Experimentation and thorough testing are

encouraged.

Date Codes that pertain to this issue:

All engineering and production devices.

8. Module: MSSP

When operated in I

C™ Master mode, the I

baud rate may be somewhat slower than predicted

by the following formula:

Work around

If the target application is sensitive to the baud rate

and requires more precision, the SSPADD value

can be adjusted to compensate.

If this work around is going to be used, it is recom-

mended that the firmware first check the Revision

ID by reading the DEVID1 value at address

3FFFFEh. Silicon revisions B6 and B7 will match

the I

C baud rate predicted by the given formula.

Date Codes that pertain to this issue:

All engineering and production devices.

C Master mode, clock

OSC

4 SSPADD 1+()•

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