Information

PIC18F2450/4450
DS80274A-page 4 © 2006 Microchip Technology Inc.
8. Module: ADC
In Section 16.2 “Selecting and Configuring
Acquisition Time”, Table 16-1 has been updated
to reflect the correct device operating frequencies.
The changes are shown in bold text.
TABLE 21-7: TAD vs. DEVICE OPERATING FREQUENCIES
9. Module: USB
In Section 14.2.2.7 “Internal Regulator”, the first
paragraph after the first note box has been
updated. The changes are shown in bold text
below:
“The regulator is disabled by default and can be
enabled through the VREGEN Configuration bit.”
10. Module: USB
In Section 14.2.2.7 “Internal Regulator”, in the
2nd note box, Note 2 changes as shown in bold
text below:
“V
DD must be greater than or equal to VUSB, even
with the regulator disabled.”
AD Clock Source (T
AD) Maximum Device Frequency
Operation ADCS2:ADCS0 PIC18FXXXX PIC18LFXXXX
(4)
2 T
OSC 000 2.86 MHz 1.43 MHz
4 TOSC 100 5.71 MHz 2.86 MHz
8 T
OSC 001 11.43 MHz 5.72 MHz
16 TOSC 101 22.86 MHz 11.43 MHz
32 TOSC 010 45.71 MHz 22.86 MHz
64 T
OSC 110 48.0 MHz 45.71 MHz
RC
(3)
x11 1.00 MHz
(1)
1.00 MHz
(2)
Note 1: The RC source has a typical TAD time of 1.2 μs.
2: The RC source has a typical TAD time of 2.5 μs.
3: For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion or the A/D
accuracy may be out of specification.
4: Low-power devices only.