Datasheet

PIC18(L)F2X/4XK22
DS41412F-page 464 2010-2012 Microchip Technology Inc.
FIGURE 27-23: A/D CONVERSION TIMING
TABLE 27-22: A/D CONVERTER CHARACTERISTICS:PIC18(L)F2X/4XK22
PIC18(L)F2X/4XK22
Standard Operating Conditions (unless otherwise stated)
Operating temperature Tested at +25°C
Param.
No.
Symbol Characteristic Min Typ Max Units Conditions
A01 N
R Resolution 10 bits VREF 3.0V
A03 EIL
Integral Linearity Error ±0.5 ±1 LSb VREF = 3.0V
A04 EDL
Differential Linearity Error ±0.5 ±1 LSb VREF 3.0V
A06 EOFF
Offset Error ±0.7 ±2 LSb VREF 3.0V
A07 EGN
Gain Error ±0.7 ±2 LSb VREF 3.0V
A08 ETOTL
Total Error ±0.8 ±3 LSb VREF 3.0V
A20 VREF
Reference Voltage Range
(V
REFHVREFL)
2—V
DD V
A21 V
REFH
Reference Voltage High VDD/2 VDD + 0.3 V
A22 V
REFL
Reference Voltage Low VSS – 0.3V VDD/2 V
A25 V
AIN
Analog Input Voltage VREFL —VREFH V
A30 Z
AIN
Recommended Impedance of
Analog Voltage Source
—— 3k
Note: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(Note 2)
987 21 0
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts.
This allows the SLEEP instruction to be executed.
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
.. .
. . .
TCY