Datasheet

 2010-2012 Microchip Technology Inc. DS41412F-page 257
PIC18(L)F2X/4XK22
TABLE 15-3: REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
— —
ANSA5
—
ANSA3 ANSA2 ANSA1 ANSA0 154
ANSELB
— —
ANSB5 ANSB4 ANSB3 ANSB2 ANSB1
(1)
ANSB0
(1)
155
ANSELC
ANSC7 ANSC6 ANSC5 ANSC4 ANSC3 ANSC2
— —
155
ANSELD
ANSD7 ANSD6 ANSD5 ANSD4 ANSD3 ANSD2 ANSD1
(2)
ANSD0
(2)
155
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 116
IPR1
—
ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP 128
IPR2
OSCFIP C1IP C2IP EEIP BCL1IP HLVDIP TMR3IP CCP2IP 129
IPR3 SSP2IP BCL2IP RC2IP TX2IP CTMUIP TMR5GIP TMR3GIP TMR1GIP 130
PIE1
—
ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE 124
PIE2
OSCFIE C1IE C2IE EEIE BCL1IE HLVDIE TMR3IE CCP2IE 125
PIE3 SSP2IE BCL2IE RC2IE TX2IE CTMUIE TMR5GIE TMR3GIE TMR1GIE 126
PIR1
—
ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF 119
PIR2
OSCFIF C1IF C2IF EEIF BCL1IF HLVDIF TMR3IF CCP2IF 120
PIR3 SSP2IF BCL2IF RC2IF TX2IF CTMUIF TMR5GIF TMR3GIF TMR1GIF 121
PMD1 MSSP2MD MSSP1MD
—
CCP5MD CCP4MD CCP3MD CCP2MD CCP1MD 56
SSP1ADD SSP1 Address Register in I
2
C Slave mode. SSP1 Baud Rate Reload Register in I
2
C Master mode. 265
SSP1BUF SSP1 Receive Buffer/Transmit Register
—
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 260
SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 262
SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 263
SSP1MSK SSP1 MASK Register bits 264
SSP1STAT SMP CKE D/A
PSR/WUA BF 259
SSP2ADD SSP2 Address Register in I
2
C Slave mode. SSP2 Baud Rate Reload Register in I
2
C Master mode. 265
SSP2BUF SSP2 Receive Buffer/Transmit Register
—
SSP2CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 260
SSP2CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 262
SSP2CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 263
SSP2MSK SSP1 MASK Register bits 264
SSP2STAT SMP CKE D/A
PSR/WUA BF 259
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1
(1)
TRISB0
(1)
156
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 156
TRISD TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1
(2)
TRISD0
(2)
156
Legend: Shaded bits are not used by the MSSPx in I
2
C mode.
Note 1: PIC18(L)F2XK22 devices.
2: PIC18(L)F4XK22 devices.