Datasheet

 2010-2012 Microchip Technology Inc. DS41412F-page 23
PIC18(L)F2X/4XK22
37 14 14 12 RB4/IOC0/T5G/AN11
RB4 I/O TTL Digital I/O.
IOC0 I TTL Interrupt-on-change pin.
T5G I ST Timer5 external clock gate input.
AN11 I Analog Analog input 11.
38 15 15 13
RB5/IOC1/P3A/CCP3/T3CKI/T1G/AN13
RB5 I/O TTL Digital I/O.
IOC1 I TTL Interrupt-on-change pin.
P3A
(1)
O CMOS Enhanced CCP3 PWM output.
CCP3
(1)
I/O ST Capture 3 input/Compare 3 output/PWM 3 output.
T3CKI
(2)
I ST Timer3 clock input.
T1G I ST Timer1 external clock gate input.
AN13 I Analog Analog input 13.
39 16 16 14
RB6/IOC2/PGC
RB6 I/O TTL Digital I/O.
IOC2 I TTL Interrupt-on-change pin.
PGC I/O ST In-Circuit Debugger and ICSP™ programming
clock pin.
40 17 17 15
RB7/IOC3/PGD
RB7 I/O TTL Digital I/O.
IOC3 I TTL Interrupt-on-change pin.
PGD I/O ST In-Circuit Debugger and ICSP™ programming
data pin.
15 32 34 30
RC0/P2B/T3CKI/T3G/T1CKI/SOSCO
RC0 I/O ST Digital I/O.
P2B
(2)
O CMOS Enhanced CCP1 PWM output.
T3CKI
(1)
I ST Timer3 clock input.
T3G I ST Timer3 external clock gate input.
T1CKI I ST Timer1 clock input.
SOSCO O — Secondary oscillator output.
16 35 35 31
RC1/P2A/CCP2/SOSCI
RC1 I/O ST Digital I/O.
P2A
(1)
O CMOS Enhanced CCP2 PWM output.
CCP2
(1)
I/O ST Capture 2 input/Compare 2 output/PWM 2 output.
SOSCI I Analog Secondary oscillator input.
17 36 36 32
RC2/CTPLS/P1A/CCP1/T5CKI/AN14
RC2 I/O ST Digital I/O.
CTPLS O — CTMU pulse generator output.
P1A O CMOS Enhanced CCP1 PWM output.
CCP1 I/O ST Capture 1 input/Compare 1 output/PWM 1 output.
T5CKI I ST Timer5 clock input.
AN14 I Analog Analog input 14.
TABLE 1-3: PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP TQFP QFN UQFN
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX
and CCP2MX are set.
2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,
CCP3MX and CCP2MX are clear.