Datasheet

PIC18F2XK20/4XK20
DS41303G-page 396 2010 Microchip Technology Inc.
FIGURE 26-16: I
2
C™ BUS START/STOP BITS TIMING
TABLE 26-18: I
2
C™ BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
FIGURE 26-17: I
2
C™ BUS DATA TIMING
Note: Refer to Figure 26-4 for load conditions.
91
92
93
SCL
SDA
Start
Condition
Stop
Condition
90
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 T
SU:STA Start Condition 100 kHz mode 4700 ns Only relevant for Repeated
Start condition
Setup Time 400 kHz mode 600
91 T
HD:STA Start Condition 100 kHz mode 4000 ns After this period, the first
clock pulse is generated
Hold Time 400 kHz mode 600
92 TSU:STO Stop Condition 100 kHz mode 4700 ns
Setup Time 400 kHz mode 600
93 T
HD:STO Stop Condition 100 kHz mode 4000 ns
Hold Time 400 kHz mode 600
Note: Refer to Figure 26-4 for load conditions.
90
91 92
100
101
103
106
107
109
109
110
102
SCL
SDA
In
SDA
Out