Information

PIC18F2331/2431/4331/4431
DS80180C-page 4 © 2005 Microchip Technology Inc.
17. Module: EUSART
Writing to the USART/EUSART TXREG register
faster than the baud rate in Synchronous mode
will overwrite the previous value instead of
double-buffering as in Asynchronous mode.
Work around
Load the first character into TXREG and then wait
for a TX interrupt, or check the TXIF bit before
writing each additional character to TXREG.
18. Module: EUSART
The EUSART cannot receive asynchronous data at
the four fastest baud rates (BRGH = 1, BRG16 = 1
and SPBRG < 4).
Work around
Use a slower baud rate or a faster system clock
speed.
19. Module: HSADC
A ΔIAD (parameter D026) of greater than 300 μA
(for V
DD = 3V) is observed when the device is
put into Sleep mode with the HSADC enabled
(ADON = 1) without setting the GO/DONE bit so
that at least one conversion is performed.
Observed ΔI
AD will increase in proportion to VDD.
Work around
If no conversion will be done while in Sleep mode,
disable the HSADC module by clearing the ADON
bit before entering Sleep mode.
If power consumption is an issue for the applica-
tion, do not put the part into Sleep mode with the
HSADC enabled if no conversion is to be
performed.