Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 300  2010 Microchip Technology Inc.
COMF Complement f
Syntax: [ label ] COMF f [,d [,a]]
Operands: 0  f  255
d  [0,1]
a  [0,1]
Operation: (f
)  dest
Status Affected: N, Z
Encoding: 0001 11da ffff ffff
Description: The contents of register, ‘f’, are comple-
mented. If ‘d’ is ‘0’, the result is stored in
W. If ‘d’ is ‘1’, the result is stored back in
register, ‘f’. If ‘a’ is 0, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value.
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
register ‘f’
Process
Data
Write to
destination
Example: COMF REG, W
Before Instruction
REG = 0x13
After Instruction
REG = 0x13
W=0xEC
CPFSEQ Compare f with W, Skip if f = W
Syntax: [ label ] CPFSEQ f [,a]
Operands: 0  f  255
a  [0,1]
Operation: (f) – (W),
skip if (f) = (W)
(unsigned comparison)
Status Affected: None
Encoding: 0110 001a ffff ffff
Description: Compares the contents of data memory
location, ‘f’, to the contents of W by
performing an unsigned subtraction.
If ‘f’ = W, then the fetched instruction is
discarded and a NOP is executed
instead, making this a two-cycle
instruction. If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value.
Words: 1
Cycles: 1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
register ‘f’
Process
Data
No
operation
If skip:
Q1 Q2 Q3 Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1 Q2 Q3 Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE CPFSEQ REG
NEQUAL :
EQUAL :
Before Instruction
PC Address = HERE
W=?
REG = ?
After Instruction
If REG = W;
PC = Address (EQUAL)
If REG  W;
PC = Address (NEQUAL)