Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 166  2010 Microchip Technology Inc.
FIGURE 17-11: QEI MODULE RESET TIMING WITH THE INDEX INPUT
QEB
QEA
UP/DOWN
IC2QEIF
POSCNT
(1)
1520 1521 1522 1523 1524 1525 1526 1527
Count (+/-)
+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 [phone] -1 -1
-1 -1 -1 -1
-1 -1 -1 -1
MAXCNT
MAXCNT = 1527
0000 0001 0002 0003 0004 0003 0002 0001 0000 1527 1526 1525 1524 1523 1522 1521 1520 1519 1518 1517 1516 1515 1514
Q4
(3)
INDX
Q1
(4)
Q1
(5)
Position
Counter Load
Forward Reverse
Note 2
Note 2
Note 1: POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge of
QEA and QEB input signals).
2: When an INDX Reset pulse is detected, POSCNT is reset to ‘0’ on the next QEA or QEB edge. POSCNT is set to
MAXCNT when POSCNT = 0 (when decrementing), which occurs on the next QEA or QEB edge. a similar Reset
sequence occurs for the reverse direction, except that the INDX signal is recognized on its falling edge. The Reset
is generated on the next QEA or QEB edge.
3: IC2QEIF is enabled for one T
CY clock cycle.
4: The position counter is loaded with 0000h (i.e., Reset) on the next QEA or QEB edge when the INDX is high.
5: The position counter is loaded with a MAXCNT value (e.g., 1527h) on the next QEA or QEB edge following the
INDX falling edge input signal detect).
6: IC2QEIF must be cleared in software.
Note 6
Q4
(3)