Datasheet
PIC18F2331/2431/4331/4431
DS39616D-page 148 2010 Microchip Technology Inc.
TABLE 16-2: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset Values
on Page:
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 54
PIR1 — ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 57
PIE1
— ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 57
IPR1 — ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 57
TRISC PORTC Data Direction Register 57
TMR1L Timer1 Register Low Byte 55
TMR1H Timer1 Register High Byte 55
T1CON RD16
T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 55
CCPR1L Capture/Compare/PWM Register 1 Low Byte 56
CCPR1H Capture/Compare/PWM Register 1 High Byte 56
CCP1CON
— — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 56
CCPR2L Capture/Compare/PWM Register 2 Low Byte 56
CCPR2H Capture/Compare/PWM Register 2 High Byte 56
CCP2CON
— — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 56
PIR2 OSCFIF — — EEIF — LVDIF — CCP2IF 57
PIE2
OSCFIE — — EEIE — LVDIE — CCP2IE 57
IPR2 OSCFIP — — EEIP — LVDIP — CCP2IP 57
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture, Compare and Timer1.