Datasheet
2010 Microchip Technology Inc. DS39616D-page 125
PIC18F2331/2431/4331/4431
TABLE 11-9: PORTE I/O SUMMARY
TABLE 11-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Pin Function
TRIS
Setting
I/O
I/O
Type
Description
RE0/AN6 RE0 0 O DIG LATE<0> data output; not affected by analog input.
1 I ST PORTE<0> data input; disabled when analog input is enabled.
AN6 1 I ANA A/D Input Channel 6. Default input configuration on POR.
RE1/AN7 RE1 0 O DIG LATE<1> data output; not affected by analog input.
1 I ST PORTE<1> data input; disabled when analog input is enabled.
AN7 1 I ANA A/D Input Channel 7. Default input configuration on POR.
RE2/AN8 RE2 0 O DIG LATE<2> data output; not affected by analog input.
1 I ST PORTE<2> data input; disabled when analog input is enabled.
AN8 1 I ANA A/D Input Channel 8. Default input configuration on POR.
MCLR/
VPP/RE3
(1)
MCLR — I ST External Master Clear input; enabled when MCLRE Configuration bit
is set.
V
PP — I ANA High-Voltage Detection; used for ICSP™ mode entry detection. Always
available, regardless of pin mode.
RE3 —
(2)
I ST PORTE<3> data input; enabled when MCLRE Configuration bit is
clear.
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1: All PORTE pins are only implemented on 40/44-pin devices.
2: RE3 does not have a corresponding TRIS bit to control data direction.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset Values
on Page:
PORTE
— — — —RE3
(1)
RE2 RE1 RE0 57
LATE — — — — — LATE Data Output Register 57
TRISE
— — — — — PORTE Data Direction Register 57
ANSEL0 ANS7
(2)
ANS6
(2)
ANS5
(2)
ANS4 ANS3 ANS2 ANS1 ANS0 56
ANSEL1 — — — — — — —ANS8
(2)
56
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTE.
Note 1: Implemented only when Master Clear functionality is disabled (CONFIG3H<7> = 0). It is available for
PIC18F4331/4431 devices only.
2: ANS5 through ANS8 are available only on PIC18F4331/4431 devices.