Datasheet

PIC18F2220/2320/4220/4320
DS39599G-page 58 © 2007 Microchip Technology Inc.
5.7 Instructions in Program Memory
The program memory is addressed in bytes. Instruc-
tions are stored as two bytes or four bytes in program
memory. The Least Significant Byte of an instruction
word is always stored in a program memory location
with an even address (LSB = 0). Figure 5-5 shows an
example of how instruction words are stored in the pro-
gram memory. To maintain alignment with instruction
boundaries, the PC increments in steps of 2 and the
LSB will always read ‘0’ (see Section 5.4 “PCL,
PCLATH and PCLATU”).
The CALL and GOTO instructions have the absolute pro-
gram memory address embedded into the instruction.
Since instructions are always stored on word bound-
aries, the data contained in the instruction is a word
address. The word address is written to PC<20:1>,
which accesses the desired byte address in program
memory. Instruction #2 in Figure 5-5 shows how the
instruction ‘GOTO 000006h’ is encoded in the program
memory. Program branch instructions, which encode a
relative address offset, operate in the same manner.
The offset value stored in a branch instruction repre-
sents the number of single-word instructions that the
PC will be offset by. Section 24.0 “Instruction Set
Summary” provides further details of the instruction
set.
FIGURE 5-5: INSTRUCTIONS IN PROGRAM MEMORY
5.7.1 TWO-WORD INSTRUCTIONS
PIC18F2X20/4X20 devices have four two-word instruc-
tions: MOVFF, CALL, GOTO and LFSR. The second
word of these instructions has the 4 MSBs set to ‘1’s
and is decoded as a NOP instruction. The lower 12 bits
of the second word contain data to be used by the
instruction. If the first word of the instruction is exe-
cuted, the data in the second word is accessed. If the
second word of the instruction is executed by itself (first
word was skipped), it will execute as a NOP. This action
is necessary when the two-word instruction is preceded
by a conditional instruction that results in a skip opera-
tion. A program example that demonstrates this con-
cept is shown in Example 5-3. Refer to Section 24.0
“Instruction Set Summary” for further details of the
instruction set.
EXAMPLE 5-3: TWO-WORD INSTRUCTIONS
Word Address
LSB = 1 LSB = 0 ↓
Program Memory
Byte Locations
→
000000h
000002h
000004h
000006h
Instruction 1:
MOVLW 055h
0Fh 55h 000008h
Instruction 2:
GOTO 000006h
EFh 03h 00000Ah
F0h 00h 00000Ch
Instruction 3:
MOVFF 123h, 456h
C1h 23h 00000Eh
F4h 56h 000010h
000012h
000014h
CASE 1:
Object Code Source Code
0110 0110 0000 0000 TSTFSZ REG1 ; is RAM location 0?
1100 0001 0010 0011 MOVFF REG1, REG2 ; No, skip this word
1111 0100 0101 0110 ; Execute this word as a NOP
0010 0100 0000 0000 ADDWF REG3 ; continue code
CASE 2:
Object Code Source Code
0110 0110 0000 0000 TSTFSZ REG1 ; is RAM location 0?
1100 0001 0010 0011 MOVFF REG1, REG2 ; Yes, execute this word
1111 0100 0101 0110 ; 2nd word of instruction
0010 0100 0000 0000 ADDWF REG3 ; continue code