Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SOIC 28 8-Bit 40 MHz I/O number 25

PIC18F2220/2320/4220/4320

FSR1H 2220 2320 4220 4320 ---- xxxx ---- uuuu ---- uuuu

FSR1L 2220 2320 4220 4320 xxxx xxxx uuuu uuuu uuuu uuuu

BSR 2220 2320 4220 4320 ---- 0000 ---- 0000 ---- uuuu

INDF2 2220 2320 4220 4320 N/A N/A N/A

POSTINC2 2220 2320 4220 4320 N/A N/A N/A

POSTDEC2 2220 2320 4220 4320 N/A N/A N/A

PREINC2 2220 2320 4220 4320 N/A N/A N/A

PLUSW2 2220 2320 4220 4320 N/A N/A N/A

FSR2H 2220 2320 4220 4320 ---- xxxx ---- uuuu ---- uuuu

FSR2L 2220 2320 4220 4320 xxxx xxxx uuuu uuuu uuuu uuuu

STATUS 2220 2320 4220 4320 ---x xxxx ---u uuuu ---u uuuu

TMR0H 2220 2320 4220 4320 0000 0000 0000 0000 uuuu uuuu

TMR0L 2220 2320 4220 4320 xxxx xxxx uuuu uuuu uuuu uuuu

T0CON 2220 2320 4220 4320 1111 1111 1111 1111 uuuu uuuu

OSCCON 2220 2320 4220 4320 0000 q000 0000 q000 uuuu qquu

LVDCON 2220 2320 4220 4320 --00 0101 --00 0101 --uu uuuu

WDTCON 2220 2320 4220 4320 ---- ---0 ---- ---0 ---- ---u

RCON

(4)

2220 2320 4220 4320 0--1 11q0 0--q qquu u--u qquu

TMR1H 2220 2320 4220 4320 xxxx xxxx uuuu uuuu uuuu uuuu

TMR1L 2220 2320 4220 4320 xxxx xxxx uuuu uuuu uuuu uuuu

T1CON 2220 2320 4220 4320 0000 0000 u0uu uuuu uuuu uuuu

TMR2 2220 2320 4220 4320 0000 0000 0000 0000 uuuu uuuu

PR2 2220 2320 4220 4320 1111 1111 1111 1111 1111 1111

T2CON 2220 2320 4220 4320 -000 0000 -000 0000 -uuu uuuu

SSPBUF 2220 2320 4220 4320 xxxx xxxx uuuu uuuu uuuu uuuu

SSPADD 2220 2320 4220 4320 0000 0000 0000 0000 uuuu uuuu

SSPSTAT 2220 2320 4220 4320 0000 0000 0000 0000 uuuu uuuu

SSPCON1 2220 2320 4220 4320 0000 0000 0000 0000 uuuu uuuu

SSPCON2 2220 2320 4220 4320 0000 0000 0000 0000 uuuu uuuu

TABLE 4-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Power-on Reset,

Brown-out Reset

MCLR

Resets

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

4: See Table 4-2 for Reset value for specific condition.

5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read ‘0’.