Datasheet
PIC18F2220/2320/4220/4320
DS39599G-page 24 © 2007 Microchip Technology Inc.
2.6.3 OSCTUN2 REGISTER
The internal oscillator block is calibrated at the factory
to produce an INTRC output frequency of approxi-
mately 31 kHz. (See parameters F20 and F21 in
Table 26-8.)
The INTRC frequency can be adjusted two ways:
• If TUNSEL (OSCTUN2<7>) is clear –
TUN5:TUN1 in OSCTUNE<5:1> adjusts the
INTRC clock frequency and also can adjust the
INTOSC clock frequency. (See Register 2-1,
OSCTUNE.)
• If TUNSEL (OSCTUN2<7>) is set – TUN5:TUN1
in OSCTUN2<5:1> adjusts the INTRC clock fre-
quency without affecting the INTOSC frequency.
(See Register 2-2, OSCTUN2.)
In OSCTUN2, the OSCTUN2<0> bit has no effect, but
is readable and writable, enabling changes of the
INTRC frequency using two increment or decrement
instructions.
When the OSCTUN2 register is modified, the INTRC
frequency will begin shifting to the new frequency, and
will stabilize at the new frequency within 100 μs. Code
execution continues during this shift.
There is no indication when the shift occurs. Operation
of features that depend on the INTRC clock source fre-
quency also will be affected by the change in fre-
quency. This includes the WDT, Fail-Safe Clock
Monitor and peripherals.
REGISTER 2-2: OSCTUN2: INTRC OSCILLATOR TUNING REGISTER
R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TUNSEL
— TUN5 TUN4 TUN3 TUN2 TUN1 TUN0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 TUNSEL: Enables tuning of INTRC using OCSTUN2<5:1>
1 = INTRC adjusted by OSCTUN2<5:1>
0 = INTRC adjusted by OSCTUNE<5:1>
bit 6 Unimplemented: Read as ‘0’
bit 5-1 TUN<5:1>: Frequency Tuning bits – Adjusts the frequency of INTRC when TUNSEL is set
011111 = Maximum frequency
• •
• •
000001
000000 = Center frequency. Oscillator module is running at the calibrated frequency.
111111
• •
• •
100000 = Minimum frequency
bit 0 TUN<0>: A placeholder with no effect on the INTRC frequency. Provided to facilitate incrementation
and decrementation of the OSCTUN2 register and adjustment of the INTRC frequency.