Datasheet

© 2007 Microchip Technology Inc. DS39599G-page 227
PIC18F2220/2320/4220/4320
21.0 COMPARATOR VOLTAGE
REFERENCE MODULE
The comparator voltage reference is a 16-tap resistor
ladder network that provides a selectable voltage refer-
ence. The resistor ladder is segmented to provide two
ranges of CV
REF values and has a power-down func-
tion to conserve power when the reference is not being
used. The CVRCON register controls the operation of
the reference as shown in Register 21-1. The block
diagram is given in Figure 21-1.
The comparator reference supply voltage comes from
V
DD and VSS.
21.1 Configuring the Comparator
Voltage Reference
The comparator voltage reference can output 16 distinct
voltage levels for each range. The equations used to cal-
culate the output of the comparator voltage reference
are as follows:
EQUATION 21-1:
The settling time of the comparator voltage reference
must be considered when changing the CV
REF
output (see Table 26-2 in Section 26.0 “Electrical
Characteristics”).
If CVRR = 1:
CV
REF = (CVR<3:0>) •
If CVRR = 0:
CV
REF = (CVR<3:0> + 8) •
V
DD
24
VDD
32
REGISTER 21-1: CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER
R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
CVREN CVROE
(1)
CVRR — CVR3 CVR2 CVR1 CVR0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CVREN: Comparator Voltage Reference Enable bit
1 =CV
REF circuit powered on
0 =CV
REF circuit powered down
bit 6 CVROE: Comparator V
REF Output Enable bit
(1)
1 =CVREF voltage level is also output on the RA2/AN2/VREF-/CVREF pin
0 =CV
REF voltage is disconnected from the RA2/AN2/VREF-/CVREF pin
bit 5 CVRR: Comparator V
REF Range Selection bit
1 = 0.00 V
DD to 0.667 VDD, with VDD/24 step size
0 = 0.25 V
DD to 0.75 VDD, with VDD/32 step size
bit 4 Unimplemented: Read as ‘0’
bit 3-0 CVR3:CVR0: Comparator V
REF Value Selection 0 ≤ VR3:VR0 ≤ 15 bits
When CVRR =
1:
CV
REF = (CVR<3:0>) •
When CVRR =
0:
CV
REF = 1/4 • (CVRSRC) + (CVR<3:0> + 8) •
Note 1: CVROE overrides the TRISA<2> bit setting.
VDD
24
VDD
32