Datasheet

© 2007 Microchip Technology Inc. DS39599G-page 225
PIC18F2220/2320/4220/4320
20.7 Comparator Operation in
Power-Managed Modes
When a comparator is active and the device is placed
in a power-managed mode, the comparator remains
active and the interrupt is functional if enabled. This
interrupt will wake-up the device from a power-
managed mode when enabled. Each operational
comparator will consume additional current, as shown
in the comparator specifications. To minimize power
consumption while in a power-managed mode, turn off
the comparators (CM<2:0> = 111) before entering the
power-managed modes. If the device wakes up from a
power-managed mode, the contents of the CMCON
register are not affected.
20.8 Effects of a Reset
A device Reset forces the CMCON register to its Reset
state, causing the comparator module to be in the Com-
parator Reset mode (CM<2:0> = 111). This ensures
that all potential inputs are analog inputs. Device cur-
rent is minimized when digital inputs are present at
Reset time. The comparators will be powered down
during the Reset interval.
20.9 Analog Input Connection
Considerations
A simplified circuit for an analog input is shown in
Figure 20-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. Therefore, the analog input must be between
V
SS and VDD. If the input voltage exceeds this range by
more than 0.6V, one of the diodes is forward biased
and a latch-up condition may occur. A maximum source
impedance of 10 kΩ is recommended for the analog
sources.
FIGURE 20-4: COMPARATOR ANALOG INPUT MODEL
VA
R
S < 10k
A
IN
CPIN
5 pF
VDD
VT = 0.6V
VT = 0.6V
R
IC
ILEAKAGE
±500 nA
V
SS
Legend: CPIN = Input Capacitance
V
T = Threshold Voltage
I
LEAKAGE = Leakage Current at the pin due to various junctions
R
IC = Interconnect Resistance
R
S = Source Impedance
VA = Analog Voltage
Comparator
Input