Datasheet

PIC18F2220/2320/4220/4320
DS39599G-page 18 © 2007 Microchip Technology Inc.
PORTE is a bidirectional I/O port.
RE0/AN5/RD
RE0
AN5
RD
82525
I/O
I
I
ST
Analog
TTL
Digital I/O.
Analog input 5.
Read control for Parallel Slave Port
(see also WR
and CS pins).
RE1/AN6/WR
RE1
AN6
WR
92626
I/O
I
I
ST
Analog
TTL
Digital I/O.
Analog input 6.
Write control for Parallel Slave Port
(see CS
and RD pins).
RE2/AN7/CS
RE2
AN7
CS
10 27 27
I/O
I
I
ST
Analog
TTL
Digital I/O.
Analog input 7.
Chip select control for Parallel Slave Port
(see related RD
and WR).
RE3 1 18 18 — — See MCLR
/VPP/RE3 pin.
V
SS 12,
31
6, 29 6, 30,
31
P — Ground reference for logic and I/O pins.
V
DD 11, 32 7, 28 7, 8
29
P — Positive supply for logic and I/O pins.
NC — — 13,
28
NC NC No connect.
TABLE 1-3: PIC18F4220/4320 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PDIP TQFP QFN
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I = Input
O = Output P = Power
OD = Open-drain (no diode to V
DD)
Note 1: Alternate assignment for CCP2 when CCP2MX is cleared.
2: Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.