Datasheet

PIC18F2220/2320/4220/4320
DS39599G-page 142 © 2007 Microchip Technology Inc.
In addition to the expanded functions of the CCP1CON
register, the ECCP module has two additional registers
associated with enhanced PWM operation and
Auto-Shutdown features:
•PWM1CON
• ECCPAS
All other registers associated with the ECCP module are
identical to those used for the CCP1 module in
PIC18F2X20 devices, including register and individual bit
names. Likewise, the timer assignments and interactions
between the two CCP modules are identical, regardless
of whether CCP1 is a standard or enhanced module.
16.1 ECCP Outputs
The Enhanced CCP module may have up to four outputs
depending on the selected operating mode. These out-
puts, designated P1A through P1D, are multiplexed with
I/O pins on PORTC and PORTD. The pin assignments
are summarized in Table 16-1.
To configure I/O pins as PWM outputs, the proper PWM
mode must be selected by setting the P1Mx and
CCP1Mx bits (CCP1CON<7:6> and <3:0>, respec-
tively). The appropriate TRISC and TRISD direction
bits for the port pins must also be set as outputs.
16.2 Capture and Compare Modes
The Capture and Compare modes of the ECCP module
are identical in operation to that of CCP1, as discussed
in Section 15.3 “Capture Mode” and Section 15.4
“Compare Mode”. No changes are required when
moving between these modules on PIC18F2X20 and
PIC18F4X20 devices.
16.3 Standard PWM Mode
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode, as described in Section 15.4
“Compare Mode”.
TABLE 16-1: PIN ASSIGNMENTS FOR VARIOUS ECCP MODES
bit 3-0 CCP1M3:CCP1M0: ECCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin operates
as a port pin for input and output)
1011 = Compare mode, trigger special event (CCP1IF bit is set, ECCP resets TMR1or TMR2 and
starts an A/D conversion if the A/D module is enabled)
1100 = PWM mode, P1A, P1C active-high, P1B, P1D active-high
1101 = PWM mode, P1A, P1C active-high, P1B, P1D active-low
1110 = PWM mode, P1A, P1C active-low, P1B, P1D active-high
1111 = PWM mode, P1A, P1C active-low, P1B, P1D active-low
REGISTER 16-1: CCP1CON: ECCP CONTROL REGISTER (40/44-PIN DEVICES) (CONTINUED)
Note: When setting up single output PWM opera-
tions, users are free to use either of the pro-
cesses described in Section 15.5.3 “Setup
for PWM Operation” or Section 16.4.7
“Setup for PWM Operation”. The latter is
more generic but will work for either single
or multi output PWM.
ECCP Mode CCP1CON Configuration RC2 RD5 RD6 RD7
Compatible CCP 00xx11xx CCP1
RD5/PSP5 RD6/PSP6 RD7/PSP7
Dual PWM 10xx11xx P1A P1B RD6/PSP6 RD6/PSP6
Quad PWM x1xx11xx P1A P1B P1C P1D
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP in a given mode.
Note 1: TRIS register values must be configured appropriately.
2: With ECCP in Dual or Quad PWM mode, the PSP input/output control of PORTD is overridden by P1B,
P1C and P1D.