Datasheet

© 2007 Microchip Technology Inc. DS39599G-page 137
PIC18F2220/2320/4220/4320
TABLE 15-3: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
(1)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
TRISC PORTC Data Direction Register 1111 1111 1111 1111
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
T1CON RD16
T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu
CCPR1L Capture/Compare/PWM Register 1 (LSB) xxxx xxxx uuuu uuuu
CCPR1H Capture/Compare/PWM Register 1 (MSB) xxxx xxxx uuuu uuuu
CCP1CON
— — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
CCPR2L Capture/Compare/PWM Register 2 (LSB) xxxx xxxx uuuu uuuu
CCPR2H Capture/Compare/PWM Register 2 (MSB) xxxx xxxx uuuu uuuu
CCP2CON
— — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
PIR2
OSCFIF CMIF — EEIF BCLIF LVDIF TMR3IF CCP2IF 00-0 0000 00-0 0000
PIE2
OSCFIE CMIE — EEIE BCLIE LVDIE TMR3IE CCP2IE 00-0 0000 00-0 0000
IPR2
OSCFIP CMIP — EEIP BCLIP LVDIP TMR3IP CCP2IP 11-1 1111 11-1 1111
TMR3L Holding Register for the Least Significant Byte of the 16-bit TMR3 Register xxxx xxxx uuuu uuuu
TMR3H Holding Register for the Most Significant Byte of the 16-bit TMR3 Register xxxx xxxx uuuu uuuu
T3CON RD16 T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC
TMR3CS TMR3ON 0000 0000 uuuu uuuu
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by Capture and Timer1.
Note 1: These bits are reserved on the PIC18F2X20 devices; always maintain these bits clear.