Datasheet
PIC18F2220/2320/4220/4320
DS39599G-page 98 © 2007 Microchip Technology Inc.
9.5 RCON Register
The RCON register contains bits used to determine the
cause of the last Reset or wake-up from power-
managed mode. RCON also contains the bit that
enables interrupt priorities (IPEN).
REGISTER 9-10: RCON: RESET CONTROL REGISTER
R/W-0 U-0 U-0 R/W-1 R-1 R-1 R/W-0 R/W-0
IPEN
— —RITO PD POR BOR
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6-5 Unimplemented: Read as ‘0’
bit 4 RI
: RESET Instruction Flag bit
1 = The RESET instruction was not executed (set by firmware only)
0 = The RESET instruction was executed causing a device Reset (must be set in software after a
Brown-out Reset occurs)
bit 3 TO
: Watchdog Time-out Flag bit
1 = Set by power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
bit 2 PD
: Power-Down Detection Flag bit
1 = Set by power-up or by the CLRWDT instruction
0 = Cleared by execution of the SLEEP instruction
bit 1 POR
: Power-on Reset Status bit
1 = A Power-on Reset has not occurred (set by firmware only)
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0 BOR
: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred (set by firmware only)
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)