Datasheet

PIC18F/LF1XK50
DS41350E-page 96 Preliminary  2010 Microchip Technology Inc.
TABLE 9-14: PORTC I/O SUMMARY
Pin Function
TRIS
Setting
I/O
I/O
Type
Description
RC0/AN4/
C12IN+/V
REF+/
INT0
RC0 0 O DIG LATC<0> data output.
1 I ST PORTC<0> data input.
AN4 1 I ANA A/D input channel 4.
C12IN+ 1 I ANA Comparators C1 and C2 non-inverting input. Analog select is
shared with ADC
.
VREF+ 1 I ANA ADC and comparator voltage reference high input.
INT0 1 I ST External Interrupt 0 input.
RC1/AN5/
C12IN1-/V
REF-/
INT1
RC1 0 O DIG LATC<1> data output.
1 I ST PORTC<1> data input.
AN5 1 I ANA A/D input channel 5.
C12IN1- 1 I ANA Comparators C1 and C2 inverting input. Analog select is
shared with ADC
.
VREF- 1 I ANA ADC and comparator voltage reference low input.
INT1 1 I ST External Interrupt 1 input.
RC2/AN6/
C12IN2-/CV
REF/
P1D/INT2
RC2 0 O DIG LATC<2> data output.
1 I ST PORTC<2> data input.
AN6 1 I ANA A/D input channel 6.
C12IN2- 1 I ANA Comparators C1 and C2 inverting input, channel 2. Analog select is
shared with ADC
.
CVREF x O ANA Voltage reference output. Enabling this feature disables digital I/O.
P1D 0 O DIG ECCP1 Enhanced PWM output, channel D. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
INT2 1 I ST External Interrupt 2 input.
RC3/AN7/
C12IN3-/P1C/
PGM
RC3 0 O DIG LATC<3> data output.
1 I ST PORTC<3> data input.
AN7 1 I ANA A/D input channel 7.
C12IN3- 1 I ANA Comparators C1 and C2 inverting input, channel 3. Analog select is
shared with ADC
.
P1C 0 O DIG ECCP1 Enhanced PWM output, channel C. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
PGM
x I ST Single-Supply Programming mode entry (ICSP™). Enabled by LVP
Configuration bit; all other pin functions disabled.
RC4/C12OUT/
P1B
RC4 0 O DIG LATC<4> data output.
1 I ST PORTC<4> data input.
C12OUT 0 O DIG Comparator 1 and 2 output; takes priority over port data.
P1B 0 O DIG ECCP1 Enhanced PWM output, channel B. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
I
2
C/SMB = I
2
C/SMBus input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).