Information

PIC18(L)F1XK50
DS80411H-page 6  2008-2012 Microchip Technology Inc.
8. Module: Boot Block Memory
8.1 BBSIZ Selection is Invalid for Code-
Protect
When code-protecting the Boot Block with the
CPB bit in CONFIG5H, the smaller Boot Block size
is used, regardless of the BBSIZ bit selection in
CONFIG4L. If Block 0 is also code-protected, the
full range of memory from the Boot Block through
Block 0 is protected; no intermediate program
memory is left unprotected.
Work around
None.
Affected Silicon Revisions
9. Module: Enhanced/Capture/Compare
PWM (ECCP)
9.1 Will not Start A/D Conversion
When the ECCP is configured to work in Compare
mode as a Special Event Trigger (CCP1M<3:0> =
1011), the special event trigger will not set the GO/
DONE bit of the ADCON0 register and A/D
conversion will not take place.
Work around
In the interrupt set ADCON0bits.GO = 1 with
software after the CCPIF is set.
Affected Silicon Revisions
A6 A7 A8 B0
X XXX
A6 A7 A8 B0
X X