Datasheet

PIC18(L)F1XK22
DS41365E-page 86 2009-2011 Microchip Technology Inc.
TABLE 8-3: PORTB I/O SUMMARY
Pin Function
TRIS
Setting
I/O
I/O
Type
Description
RB4/AN10/SDI/
SDA
RB4 0 O DIG LATB<4> data output.
1 I TTL PORTB<4> data input; Programmable weak pull-up.
AN10 1 I ANA ADC input channel 10.
SDI 1 I ST SPI data input (MSSP module).
SDA 1 ODIGI
2
C™ data output (MSSP module).
1 II
2
CI
2
C™ data input (MSSP module); input type depends on module
setting.
RB5/AN11/RX/DT RB5 0 O DIG LATB<5> data output.
1 I TTL PORTB<5> data input; Programmable weak pull-up.
AN11 1 I ANA ADC input channel 11.
RX 1 I ST Asynchronous serial receive data input (USART module).
DT 1 ODIG
Synchronous serial data output (USART module); takes priority over
PORT data.
1 IST
Synchronous serial data input (USART module). User must configure
as an input.
RB6/SCK/SCL RB6 0 O DIG LATB<6> data output.
1 I TTL PORTB<6> data input; Programmable weak pull-up.
SCK 0 O DIG SPI clock output (MSSP module).
1 I ST SPI clock input (MSSP module).
SCL 0 ODIGI
2
C™ clock output (MSSP module).
1 II
2
CI
2
C™ clock input (MSSP module); input type depends on module
setting.
RB7/TX/CK RB7 0 O DIG LATB<7> data output.
1 I TTL PORTB<7> data input; Programmable weak pull-up.
TX 1 ODIG
Asynchronous serial transmit data output (USART module).
CK
1 ODIG
Synchronous serial clock output (USART module).
1 I ST Synchronous serial clock input (USART module).
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
I
2
C = Schmitt Trigger input with I
2
C; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).