Datasheet

PIC18(L)F1XK22
DS41365E-page 80 2009-2011 Microchip Technology Inc.
REGISTER 8-3: LATA: PORTA DATA LATCH REGISTER
U-0 U-0 R/W-x R/W-x U-0 R/W-x R/W-x R/W-x
—LATA5LATA4 LATA2 LATA1 LATA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0
bit 5-4 LATA<5:4>: RA<5:4> Port I/O Output Latch Register bits
bit 3 Unimplemented: Read as ‘0
bit 2-0 LATA<2:0>: RA<2:0> Port I/O Output Latch Register bits
REGISTER 8-4: WPUA: WEAK PULL-UP PORTA REGISTER
U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
WPUA5 WPUA4 WPUA3 WPUA2 WPUA1 WPUA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 WPUA<5:0>: Weak Pull-up Enable bit
1 = Pull-up enabled
0 = Pull-up disabled
REGISTER 8-5: IOCA: INTERRUPT-ON-CHANGE PORTA REGISTER
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 IOCA<5:0>: PORTA I/O Pin bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled