Datasheet

 2009-2011 Microchip Technology Inc. DS41365E-page 73
PIC18(L)F1XK22
REGISTER 7-9: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 U-0 R/W-1 U-0
OSCFIP C1IP C2IP EEIP BCLIP
—TMR3IP—
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6 C1IP: Comparator C1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5 C2IP: Comparator C2 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4 EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3 BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2 Unimplemented: Read as ‘0’
bit 1 TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0 Unimplemented: Read as ‘0’