Datasheet
2009-2011 Microchip Technology Inc. DS41365E-page 241
PIC18(L)F1XK22
FIGURE 20-2: VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
REGISTER 20-1: VREFCON0: VOLTAGE REFERENCE CONTROL REGISTER 0
R/W-0 R-0 R/W-0 R/W-1 U-0 U-0 U-0
U-0
FVR1EN FVR1ST FVR1S1 FVR1S0 — — —
—
bit 7
bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 FVR1EN: Fixed Voltage Reference 1 Enable bit
0 = FVR is disabled
1 = FVR is enabled
bit 6 FVR1ST: Fixed Voltage Reference 1 Stable bit
0 = FVR is not stable
1 = FVR is stable
bit 5-4 FVR1S<1:0>: Fixed Voltage Reference 1 Voltage Select bits
00 = Reserved, do not use
01 = 1.024V (x1)
10 = 2.048V (x2)
11 = 4.096V (x4)
bit 3-0 Unimplemented: Read as ‘0’
Buffered CVREF Output
+
–
CVREF
Module
Voltage
Reference
Output
Impedance
R
(1)
CVREF
Note 1: R is dependent upon the voltage reference Configuration bits, CVR<3:0> and CVRR.
PIC18(L)F1XK22