Datasheet
2009-2011 Microchip Technology Inc. DS41365E-page 215
PIC18(L)F1XK22
TABLE 16-2: REGISTERS ASSOCIATED WITH A/D OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
ADRESH A/D Result Register, High Byte 255
ADRESL A/D Result Register, Low Byte 255
ADCON0
— — CHS3 CHS2 CHS1 CHS0 GO/DONE ADON 255
ADCON1
— — — —
PVCFG1 PVCFG0 NVCFG1 NVCFG0
255
ADCON2 ADFM
— ACQT2 ACQT1 ACQT0 ADCS2 ADCS1 ADCS0 255
ANSEL ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 256
ANSELH
— — — — ANS11 ANS10 ANS9 ANS8 256
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RABIE TMR0IF INT0IF RABIF 253
IPR1
—
ADIP
RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 256
PIE1
—
ADIE
RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 256
PIR1
—
ADIF
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 256
TRISA
– –
TRISA5 TRISA4
–
TRISA2 TRISA1 TRISA0
256
TRISB
TRISB7 TRISB6 TRISB5 TRISB4
– – – –
256
TRISC
TRISC7 TRISC6
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
256
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.