Datasheet

 2009-2011 Microchip Technology Inc. DS41365E-page 199
PIC18(L)F1XK22
TABLE 15-8: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
BAUDCON ABDOVF RCIDL DTRXP CKTXP BRG16 — WUE ABDEN 255
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RABIE TMR0IF INT0IF RABIF 253
IPR1 — ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 256
PIE1
— ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 256
PIR1 — ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 256
RCREG EUSART Receive Register 255
RCSTA SPEN RX9 SREN CREN
ADDEN FERR OERR RX9D 255
SPBRG EUSART Baud Rate Generator Register, Low Byte 255
SPBRGH EUSART Baud Rate Generator Register, High Byte 255
TXSTA CSRC
TX9 TXEN SYNC SENDB BRGH TRMT TX9D 255
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master reception.