Datasheet

2009-2011 Microchip Technology Inc. DS41365E-page 187
PIC18(L)F1XK22
15.3 EUSART Baud Rate Generator
(BRG)
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDCON register selects 16-bit
mode.
The SPBRGH:SPBRG register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the TXSTA
register and the BRG16 bit of the BAUDCON register. In
Synchronous mode, the BRGH bit is ignored.
Table 15-3 contains the formulas for determining the
baud rate. Example 15-1 provides a sample calculation
for determining the baud rate and baud rate error.
Typical baud rates and error values for various
asynchronous modes have been computed for your
convenience and are shown in Table 15-5. It may be
advantageous to use the high baud rate (BRGH = 1),
or the 16-bit BRG (BRG16 = 1) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPBRGH, SPBRG register
pair causes the BRG timer to be reset (or cleared). This
ensures that the BRG does not wait for a timer overflow
before outputting the new baud rate.
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
EXAMPLE 15-1: CALCULATING BAUD
RATE ERROR
TABLE 15-3: BAUD RATE FORMULAS
TABLE 15-4: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
For a device with FOSC of 16 MHz, desired baud rate
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPBRGH:SPBRG:
Desired Baud Rate
F
OSC
64 [SPBRGH:SPBRG] 1+
---------------------------------------------------------------------=
25.04225==
Calculated Baud Rate
16000000
64 25 1+
---------------------------=
9615=
Error
Calc. Baud Rate Desired Baud Rate
Desired Baud Rate
--------------------------------------------------------------------------------------------=
9615 9600
9600
---------------------------------- 0 . 1 6 %==
FOSC
X =
64* (Desired Baud Rate)
-1
(
)
16,000,000
=
64* 9600
-1
(
)
Configuration Bits
BRG/EUSART Mode
Baud Rate Formula
SYNC BRG16 BRGH
000 8-bit/Asynchronous F
OSC/[64 (n+1)]
001 8-bit/Asynchronous
F
OSC/[16 (n+1)]
010 16-bit/Asynchronous
011 16-bit/Asynchronous
F
OSC/[4 (n+1)]10x 8-bit/Synchronous
11x 16-bit/Synchronous
Legend: x = Don’t care, n = value of SPBRGH, SPBRG register pair
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset Values
on page
BAUDCON
ABDOVF RCIDL DTRXP CKTXP BRG16 WUE ABDEN 255
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 255
SPBRG EUSART Baud Rate Generator Register, Low Byte 255
SPBRGH EUSART Baud Rate Generator Register, High Byte 255
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 255
Legend: — = unimplemented, read as0’. Shaded cells are not used by the BRG.