Datasheet

PIC18F/LF1XK50
DS41350E-page 86 Preliminary  2010 Microchip Technology Inc.
REGISTER 9-3: WPUA: WEAK PULL-UP PORTA REGISTER
U-0 U-0 R/W-1 R/W-1 RW-1 U-0 U-0 U-0
— — WPUA5 WPUA4 WPUA3 — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-3 WPUA<5:3>: Weak Pull-up Enable bit
1 = Pull-up enabled
0 = Pull-up disabled
bit 2 Unimplemented: Read as ‘0’
bit 1-0 WPUA<1:0>: Weak Pull-up Enable bit
1 = Pull-up enabled
0 = Pull-up disabled
REGISTER 9-4: IOCA: INTERRUPT-ON-CHANGE PORTA REGISTER
U-0 U-0 R/W-0 R/W-0 R-0 U-0 R/W-0 R/W-0
— — IOCA5 IOCA4 IOCA3 — IOCA1 IOCA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-3 IOCA<5:3>: PORTA I/O Pin bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
bit 2 Unimplemented: Read as ‘0’
bit 1-0 IOCA<1:0>: PORTA I/O Pin bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
REGISTER 9-5: LATA: PORTA DATA LATCH REGISTER
U-0 U-0 R/W-x R/W-x U-0 U-0 U-0 U-0
— —LATA5LATA4— — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-4 LATA<5:4>: RA<5:4> Port I/O Output Latch Register bits
bit 3-0 Unimplemented: Read as ‘0’