Datasheet

 2010 Microchip Technology Inc. Preliminary DS41350E-page 387
PIC18F/LF1XK50
FIGURE 27-11: CAPTURE/COMPARE/PWM TIMINGS (CCP)
TABLE 27-7: CAPTURE/COMPARE/PWM REQUIREMENTS (CCP)
TABLE 27-8: PIC18F1XK50/PIC18LF1XK50 A/D CONVERTER (ADC) CHARACTERISTICS:
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C  T
A  +125°C
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
CC01* TccL CCPx Input Low Time No Prescaler 0.5T
CY + 20 — — ns
With Prescaler 20 — — ns
CC02* TccH CCPx Input High Time No Prescaler 0.5T
CY + 20 — — ns
With Prescaler 20 — — ns
CC03* TccP CCPx Input Period 3T
CY + 40
N
— — ns N = prescale value (1, 4 or 16)
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Standard Operating Conditions (unless otherwise stated)
Operating temperature T
A  25°C
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
AD01 N
R Resolution — — 10 bit
AD02 E
IL Integral Error — — ±2 LSb VREF = 3.0V
AD03 E
DL Differential Error — — 1.5 LSb No missing codes
V
REF = 3.0V
AD04 E
OFF Offset Error — — ±3 LSb VREF = 3.0V
AD05 E
GN Gain Error — — ±3 LSb VREF = 3.0V
AD06 V
REF Change in Reference Voltage =
V
REF+ - VREF-
(3)
1.8 — VDD V1.8 VREF+ VDD + 0.3V
V
SS - 0.3V VREF- VREF+ - 1.8V
AD07 V
AIN Full-Scale Range VSS —VREF V
AD08 Z
AIN Recommended Impedance of
Analog Voltage Source
——2.5
k
Can go higher if external 0.01F capacitor is
present on input pin.
AD09* I
REF VREF Input Current
(3)
10 — 1000 A During VAIN acquisition.
Based on differential of V
HOLD to VAIN.
—— 10A During A/D conversion cycle.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Total Absolute Error includes integral, differential, offset and gain errors.
2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
3: ADC V
REF is from external VREF, VDD pin or FVR, whichever is selected as reference input.
4: When ADC is off, it will not consume any current other than leakage current. The power-down current specification
includes any such leakage from the ADC module.
Note: Refer to Figure 27-2 for load conditions.
(Capture mode)
CC01 CC02
CC03
CCPx