Datasheet

 2010 Microchip Technology Inc. Preliminary DS41350E-page 29
PIC18F1XK50/PIC18LF1XK50
3.0 MEMORY ORGANIZATION
There are three types of memory in PIC18 Enhanced
microcontroller devices:
• Program Memory
• Data RAM
• Data EEPROM
As Harvard architecture devices, the data and program
memories use separate busses; this allows for concur-
rent access of the two memory spaces. The data
EEPROM, for practical purposes, can be regarded as
a peripheral device, since it is addressed and accessed
through a set of control registers.
Additional detailed information on the operation of the
Flash program memory is provided in Section 4.0
“Flash Program Memory”. Data EEPROM is
discussed separately in Section 5.0 “Data EEPROM
Memory”.
3.1 Program Memory Organization
PIC18 microcontrollers implement a 21-bit program
counter, which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP instruction).
This family of devices contain the following:
• PIC18F13K50: 8 Kbytes of Flash Memory, up to
4,096 single-word instructions
• PIC18F14K50: 16 Kbytes of Flash Memory, up to
8,192 single-word instructions
PIC18 devices have two interrupt vectors and one
Reset vector. The Reset vector address is at 0000h
and the interrupt vector addresses are at 0008h and
0018h.
The program memory map for PIC18F/LF1XK50
devices is shown in Figure 3-1. Memory block details
are shown in Figure 24-2.
FIGURE 3-1: PROGRAM MEMORY MAP AND STACK FOR PIC18F/LF1XK50 DEVICES
PC<20:0>
Stack Level 1

Stack Level 31
Reset Vector
Low Priority Interrupt Vector


CALL,RCALL,RETURN
RETFIE,RETLW
21
0000h
0018h
High Priority Interrupt Vector
0008h
User Memory Space
1FFFFFh
4000h
3FFFh
200000h
On-Chip
Program Memory
Read ‘0’
1FFFh
2000h
On-Chip
Program Memory
Read ‘0’
PIC18F14K50
PIC18F13K50