Datasheet

PIC18F/LF1XK50
DS41350E-page 248 Preliminary  2010 Microchip Technology Inc.
REGISTER 21-2: REFCON1: REFERENCE CONTROL REGISTER 1
R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 U-0 R/W-0
D1EN D1LPS DAC1OE
--- D1PSS1 D1PSS0 --- D1NSS
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 D1EN: DAC 1 Enable bit
0 = DAC 1 is disabled
1 = DAC 1 is enabled
bit 6 D1LPS: DAC 1 Low-Power Voltage State Select bit
0 =V
DAC = DAC1 Negative reference source selected
1 =V
DAC = DAC1 Positive reference source selected
bit 5 DAC1OE: DAC 1 Voltage Output Enable bit
1 = DAC 1 voltage level is also outputed on the RC2/AN6/P1D/C12IN2-/CV
REF/INT2 pin
0 = DAC 1 voltage level is disconnected from RC2/AN6/P1D/C12IN2-/CV
REF/INT2 pin
bit 4 Unimplemented: Read as ‘0’
bit 3-2 D1PSS<1:0>: DAC 1 Positive Source Select bits
00 =V
DD
01 =VREF+
10 = FVR output
11 = Reserved, do not use
bit 1 Unimplemented: Read as ‘0’
bit 0 D1NSS: DAC1 Negative Source Select bits
0 =V
SS
1 =VREF-
REGISTER 21-3: REFCON2: REFERENCE CONTROL REGISTER 2
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
--- --- --- DAC1R4 DAC1R3 DAC1R2 DAC1R1 DAC1R0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-5 Unimplemented: Read as ‘0’
bit 4-0 DAC1R<4:0>: DAC1 Voltage Output Select bits
V
OUT = ((VSOURCE+) - (VSOURCE-))*(DAC1R<4:0>/(2^5)) + VSOURCE-
Note 1: The output select bits are always right justified to ensure that any number of bits can be used without
affecting the register layout.