Datasheet

 2010 Microchip Technology Inc. Preliminary DS41350E-page 189
PIC18F/LF1XK50
TABLE 16-2: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RABIE TMR0IF INT0IF RABIF 285
PIR1 — ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 288
PIE1 — ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 288
IPR1
— ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 288
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 287
RCREG EUSART Receive Register 287
TRISC TRISC7
TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 288
TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 287
BAUDCON ABDOVF RCIDL DTRXP CKTXP BRG16 — WUE ABDEN 287
SPBRGH EUSART Baud Rate Generator Register, High Byte 287
SPBRG EUSART Baud Rate Generator Register, Low Byte 287
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.