Datasheet

PIC18F/LF1XK50
DS41350E-page 180 Preliminary  2010 Microchip Technology Inc.
TABLE 15-4: SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on
page
IPR1
— ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 288
PIR1
— ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 288
PIE1
— ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 288
IPR2
OSCFIP C1IP C2IP EEIP BCLIP USBIP TMR3IP
—
288
PIR2
OSCFIF C1IF C2IF EEIF BCLIF USBIF TMR3IF
—
288
PIE2
OSCFIE C1IE C2IE EEIE BCLIE USBIE TMR3IE
—
288
SSPADD SSP Address Register in I
2
C™ Slave Mode. SSP Baud Rate Reload Register in I
2
C Master
Mode.
286
SSPBUF SSP Receive Buffer/Transmit Register 286
SSPCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 286
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 286
SSPMSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 288
SSPSTAT SMP CKE D/A
PSR/WUA BF 286
TRISB
TRISB7 TRISB6 TRISB5 TRISB4
— — — —
288
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by I
2
C™.