Information

PIC18(L)F1XK50
DS80411H-page 2  2008-2012 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature
Item
Number
Issue Summary
Affected Revisions
(1)
A6 A7 A8 B0
ADC (Analog-to-Digital
Converter)
Conversions 1.1 INL error and acquisition time. X X
ADC (Analog-to-Digital
Converter)
Conversions 1.2 May fail in RUN mode. X
ADC (Analog-to-Digital
Converter)
Conversions 1.3 High pin leakage. X X X
ADC (Analog-to-Digital
Converter)
Conversions 1.4 Offset error. X X
ADC (Analog-to-Digital
Converter)
Conversions 1.5 ADC conversion does not
complete.
XX
MSSP (Master
Synchronous Serial
Port)
Transmit Setup 2.1 SPI and I
2
C™ clock and bit
issues.
XXXX
MSSP (Master
Synchronous Serial
Port)
Receive mode 2.2 SSPIF flag set early. X X X X
System Clocks HFINTOSC 3.1 Frequency instability. X X
System Clocks HFINTOSC 3.2 Frequency shift on Reset. X
EUSART Receive mode 4.1 RCIDL bit issue. X
EUSART OERR flag 4.2 Cannot clear the OERR flag. X X
EUSART Asynchronous mode 4.3 TX/CK improperly driven. X X X X
CPU Sleep 5.1 Reset on Wake-up. X X
Timer1 Oscillator Operations 6.1 Fails to operate above 90°C. X X X
IOC (Interrupt-on-
Change)
Multiple Sources 7.1 Invalid interrupts. X X X X
Boot Block Memory Code Protection 8.1 BBSIZ selection is invalid for
code-protect.
XXXX
Enhanced/Capture/
Compare PWM (ECCP)
Special Event Trigger 9.1 Will not start A/D conversion. X X
Note 1: Only those issues indicated in the last column apply to the current silicon revision.