Information

 2008-2012 Microchip Technology Inc. DS80411H-page 3
PIC18(L)F1XK50
Silicon Errata Issues
1. Module: ADC (Analog-to-Digital
Converter)
1.1 Offset error is 3 LSb typical, 7 LSb maximum,
including an acquisition time dependent
component (~2 LSb).
Work around
The time dependent error is insignificant
when the time between conversions is less
than 100 ms. When the time since the previ-
ous conversion is greater than 100 ms, take
two ADC conversions and discard the first.
Affected Silicon Revisions
1.2 When the ADC is configured to operate with
the internal FRC oscillator (ADCON2<2:0> =
X11) and the device is not in Sleep, then the
ADC may fail to complete the conversion
which is indicated by the GO/DONE
bit of the
ADCON0 register remaining in the GO state
indefinitely. This condition can be cleared by
a device Reset or by clearing the ADON bit
of the ADCON0 register.
Work around
1. Select a clock source that is not FRC.
2. Set the ADIE bit of the PIE1 register and
clear the ADIF bit of the PIR1 register, then
put the part to Sleep immediately after
setting the GO/DONE bit of the ADCON0
register. The device will perform the
conversion during Sleep and Wake at the
completion.
Affected Silicon Revisions
1.3 ADC conversion on AN3/OSC2 will have
large INL error up to approximately 8 LSb.
Work around
None for the AN3 pin. For better accuracy,
use another analog pin.
Affected Silicon Revisions
1.4 The offset error incorrectly exceeds the data
sheet specifications if time between conver-
sions is longer than 10 ms. If the time
between conversions is greater than 10 ms,
the offset error is 1 LSB typical and 3.3 LSB
maximum.
Work around
The time dependent error is insignificant
when the time between conversions is less
than 10 ms. When the time between conver-
sions is greater than 10 ms, take two back-
to-back ADC conversions and discard the
results of the first conversion.
Affected Silicon Revisions
1.5 Under certain device operating conditions,
the ADC conversion may not complete prop-
erly. When this occurs, the ADC Interrupt
Flag (ADIF) does not get set, the ADGO/
DONE
bit does not get cleared, and the
conversion result does not get loaded into
the ADRESH and ADRESL result registers.
Work around
Select the dedicated RC oscillator as the
ADC conversion clock source and perform
all conversions with the device in Sleep.
Affected Silicon Revisions
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B0).
A6 A7 A8 B0
X X
A6 A7 A8 B0
X
A6 A7 A8 B0
X XX
A6 A7 A8 B0
X X
A6 A7 A8 B0
X X