Datasheet
PIC18F1230/1330
DS39758D-page 50 2009 Microchip Technology Inc.
SEVTCMPH 1230 1330 ---- 0000 ---- 0000 ---- uuuu
PWMCON0 1230 1330 -100 -000
(6)
-100 -000
(6)
-uuu -uuu
(6)
-000 -000
(6)
-000 -000
(6)
-uuu -uuu
(6)
PWMCON1 1230 1330 0000 0-00 0000 0-00 uuuu u-uu
DTCON 1230 1330 0000 0000 0000 0000 uuuu uuuu
OVDCOND 1230 1330 --11 1111 --11 1111 --uu uuuu
OVDCONS 1230 1330 --00 0000 --00 0000 --uu uuuu
PORTB 1230 1330 xxxx xxxx uuuu uuuu uuuu uuuu
PORTA 1230 1330 xx0x xxxx
(5)
uu0u uuuu
(5)
uuuu uuuu
(5)
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 5-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read as ‘0’.
6: Reset condition of PWMEN bits depends on the PWMPIN Configuration bit of CONFIG3L.