Datasheet

 2009 Microchip Technology Inc. DS39758D-page 309
PIC18F1230/1330
Associated Registers, Transmit ....................... 165
Reception ......................................................... 166
Transmission ................................................... 164
Synchronous Slave Mode ........................................ 167
Associated Registers, Receive ........................ 168
Associated Registers, Transmit ....................... 167
Reception ......................................................... 168
Transmission ................................................... 167
Extended Instruction Set
ADDFSR .................................................................. 258
ADDULNK ................................................................ 258
and Using MPLAB Tools .......................................... 264
CALLW ..................................................................... 259
Considerations for Use ............................................ 262
MOVSF .................................................................... 259
MOVSS .................................................................... 260
PUSHL ..................................................................... 260
SUBFSR .................................................................. 261
SUBULNK ................................................................ 261
Syntax ...................................................................... 257
External Clock Input ........................................................... 22
F
Fail-Safe Clock Monitor ............................................ 191, 205
Exiting Operation ..................................................... 205
Interrupts in Power-Managed Modes ....................... 206
POR or Wake From Sleep ....................................... 206
WDT During Oscillator Failure ................................. 205
Fast Register Stack ............................................................ 54
Firmware Instructions ....................................................... 215
Flash Program Memory ..................................................... 71
Associated Registers ................................................. 79
Control Registers ....................................................... 72
EECON1 and EECON2 ..................................... 72
TABLAT (Table Latch) Register ......................... 74
TBLPTR (Table Pointer) Register ...................... 74
Erase Sequence ........................................................ 76
Erasing ....................................................................... 76
Operation During Code-Protect ................................. 79
Reading ...................................................................... 75
Table Pointer
Boundaries Based on Operation ........................ 74
Operations with TBLRD and TBLWT (table) ...... 74
Table Pointer Boundaries .......................................... 74
Table Reads and Table Writes .................................. 71
Write Sequence ......................................................... 77
Writing ........................................................................ 77
Protection Against Spurious Writes ................... 79
Unexpected Termination .................................... 79
Write Verify ........................................................ 79
FSCM. See Fail-Safe Clock Monitor.
G
GOTO .............................................................................. 236
H
Hardware Multiplier ............................................................ 85
Introduction ................................................................ 85
Operation ................................................................... 85
Performance Comparison .......................................... 85
I
I/O Ports ............................................................................ 87
ID Locations ............................................................. 191, 210
INCF ................................................................................ 236
INCFSZ ............................................................................ 237
In-Circuit Debugger .......................................................... 210
In-Circuit Serial Programming (ICSP) ...................... 191, 210
Independent PWM Mode
Duty Cycle Assignment ........................................... 137
Output ...................................................................... 137
Output, Channel Override ........................................ 138
Indexed Literal Offset Addressing
and Standard PIC18 Instructions ............................. 262
Indexed Literal Offset Mode ............................................. 262
Indirect Addressing ............................................................ 66
INFSNZ ............................................................................ 237
Initialization Conditions for all Registers ...................... 47–50
Instruction Cycle ................................................................ 55
Clocking Scheme ....................................................... 55
Flow/Pipelining .......................................................... 55
Instruction Set .................................................................. 215
ADDLW .................................................................... 221
ADDWF ................................................................... 221
ADDWF (Indexed Literal Offset Mode) .................... 263
ADDWFC ................................................................. 222
ANDLW .................................................................... 222
ANDWF ................................................................... 223
BC ............................................................................ 223
BCF ......................................................................... 224
BN ............................................................................ 224
BNC ......................................................................... 225
BNN ......................................................................... 225
BNOV ...................................................................... 226
BNZ ......................................................................... 226
BOV ......................................................................... 229
BRA ......................................................................... 227
BSF .......................................................................... 227
BSF (Indexed Literal Offset Mode) .......................... 263
BTFSC ..................................................................... 228
BTFSS ..................................................................... 228
BTG ......................................................................... 229
BZ ............................................................................ 230
CALL ........................................................................ 230
CLRF ....................................................................... 231
CLRWDT ................................................................. 231
COMF ...................................................................... 232
CPFSEQ .................................................................. 232
CPFSGT .................................................................. 233
CPFSLT ................................................................... 233
DAW ........................................................................ 234
DCFSNZ .................................................................. 235
DECF ....................................................................... 234
DECFSZ .................................................................. 235
Extended Instruction Set ......................................... 257
General Format ....................................................... 217
GOTO ...................................................................... 236
INCF ........................................................................ 236
INCFSZ .................................................................... 237
INFSNZ .................................................................... 237
IORLW ..................................................................... 238
IORWF ..................................................................... 238
LFSR ....................................................................... 239
MOVF ...................................................................... 239
MOVFF .................................................................... 240
MOVLB .................................................................... 240