Datasheet

PIC18F1230/1330
 2009 Microchip Technology Inc. DS39758D-page 185
FIGURE 18-1: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
18.2 Voltage Reference Accuracy/Error
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 18-1) keep CV
REF from approaching the
reference source rails. The voltage reference is derived
from the reference source; therefore, the CVREF output
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 23.0 “Electrical Characteristics”.
18.3 Operation During Sleep
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
18.4 Effects of a Reset
A device Reset disables the voltage reference by clearing
bit, CVREN (CVRCON<7>). This Reset selects the high-
voltage range by clearing bit, CVRR (CVRCON<5>). The
CVR value select bits are also cleared.
TABLE 18-2: REGISTERS ASSOCIATED WITH COMPARATOR VOLTAGE REFERENCE
16-to-1 MUX
CVR3:CVR0
8R
R
CVREN
CVRSS = 0
AV
DD
VREF+
CVRSS = 1
8R
CVRSS = x
AV
SS
R
R
R
R
R
R
16 Steps
CVRR
CVREF
CVREN = 0
CVREN = 1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page:
CVRCON CVREN
— CVRR CVRSS CVR3 CVR2 CVR1 CVR0 48
CMCON C2OUT C1OUT C0OUT — — CMEN2 CMEN1 CMEN0 48
Legend: Shaded cells are not used with the comparator voltage reference.