Datasheet

Table Of Contents
© 2007 Microchip Technology Inc. DS39605F-page 215
PIC18F1220/1320
LFSR Load FSR
Syntax: [ label ] LFSR f,k
Operands: 0 f 2
0 k 4095
Operation: k FSRf
Status Affected: None
Encoding:
1110
1111
1110
0000
00ff
k
7
kkk
k
11
kkk
kkkk
Description: The 12-bit literal ‘k’ is loaded into
the file select register pointed to
by ‘f’.
Words: 2
Cycles: 2
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read literal
‘k’ MSB
Process
Data
Write literal
‘k’ MSB to
FSRfH
Decode Read literal
‘k’ LSB
Process
Data
Write literal
‘k’ to FSRfL
Example:
LFSR 2, 0x3AB
After Instruction
FSR2H = 0x03
FSR2L = 0xAB
MOVF Move f
Syntax: [ label ] MOVF f [,d [,a]]
Operands: 0 f 255
d [0,1]
a [0,1]
Operation: f dest
Status Affected: N, Z
Encoding:
0101 00da ffff ffff
Description: The contents of register ‘f’ are
moved to a destination dependent
upon the status of ‘d’. If ‘d’ is ‘f’, the
result is placed in W. If ‘d’ is ‘f’, the
result is placed back in register ‘f’
(default). Location ‘f’ can be any-
where in the 256-byte bank. If ‘a’ is
0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
register ‘f’
Process
Data
Write W
Example:
MOVF REG, W
Before Instruction
REG = 0x22
W=0xFF
After Instruction
REG = 0x22
W = 0x22