Datasheet

Table Of Contents
PIC18F1220/1320
DS39605F-page 160 © 2007 Microchip Technology Inc.
17.1 A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
HOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 17-2. The
source impedance (R
S) and the internal sampling
switch (R
SS) impedance directly affect the time
required to charge the capacitor C
HOLD. The sampling
switch (R
SS) impedance varies over the device voltage
(V
DD). The source impedance affects the offset voltage
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 kΩ. After the analog input channel is
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
To calculate the minimum acquisition time,
Equation 17-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 17-1 shows the calculation of the minimum
required acquisition time, T
ACQ. This calculation is
based on the following application system
assumptions:
C
HOLD = 120 pF
Rs = 2.5 kΩ
Conversion Error 1/2 LSb
V
DD =5V RSS = 7 kΩ
Temperature = 50°C (system max.)
VHOLD = 0V @ time = 0
17.2 A/D VREF+ and VREF- References
If external voltage references are used instead of the
internal AV
DD and AVSS sources, the source imped-
ance of the V
REF+ and VREF- voltage sources must be
considered. During acquisition, currents supplied by
these sources are insignificant. However, during
conversion, the A/D module sinks and sources current
through the reference sources.
In order to maintain the A/D accuracy, the voltage
reference source impedances should be kept low to
reduce voltage changes. These voltage changes occur
as reference currents flow through the reference
source impedance. The maximum recommended
impedance of the V
REF+ and VREF- external
reference voltage sources is 250Ω.
EQUATION 17-1: ACQUISITION TIME
EQUATION 17-2: A/D MINIMUM CHARGING TIME
EXAMPLE 17-1: CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
Note: When the conversion is started, the
holding capacitor is disconnected from the
input pin.
TACQ = Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
=T
AMP + TC + TCOFF
VHOLD = (ΔVREF – (ΔVREF/2048)) • (1 – e
(-TC/CHOLD(RIC + RSS + RS))
)
or
T
C = -(CHOLD)(RIC + RSS + RS) ln(1/2048)
TACQ =TAMP + TC + TCOFF
TAMP =5 μs
T
COFF = (Temp – 25ºC)(0.05 μs/ºC)
(50ºC – 25ºC)(0.05 μs/ºC)
1.25 μs
Temperature coefficient is only required for temperatures > 25ºC. Below 25ºC, T
COFF = 0 μs.
T
C =-(CHOLD)(RIC + RSS + RS) ln(1/2047) μs
-(120 pF) (1 kΩ + 7 kΩ + 2.5 kΩ) ln(0.0004883) μs
9.61 μs
T
ACQ =5 μs + 1.25 μs + 9.61 μs
12.86 μs