Datasheet

PIC18CXX2
DS39026D-page 256  1999-2013 Microchip Technology Inc.
FIGURE 21-16: I
2
C BUS START/STOP BITS TIMING
TABLE 21-15: I
2
C BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
Note: Refer to Figure 21-4 for load conditions.
91
92
93
SCL
SDA
START
Condition
STOP
Condition
90
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 Tsu:sta START condition 100 kHz mode 4700 — ns Only relevant for Repeated
START condition
Setup time 400 kHz mode 600 —
91 Thd:sta START condition 100 kHz mode 4000 — ns After this period the first
clock pulse is generated
Hold time 400 kHz mode 600 —
92 Tsu:sto STOP condition 100 kHz mode 4700 — ns
Setup time 400 kHz mode 600 —
93 Thd:sto STOP condition 100 kHz mode 4000 — ns
Hold time 400 kHz mode 600 —