Datasheet

PIC18CXX2
DS39026D-page 78  1999-2013 Microchip Technology Inc.
FIGURE 8-2: BLOCK DIAGRAM OF
RA4/T0CKI PIN
FIGURE 8-3: BLOCK DIAGRAM OF RA6
Data
Bus
WR TRISA
RD PORTA
Data Latch
TRIS Latch
RD TRISA
Schmitt
Trigger
Input
Buffer
N
V
SS
I/O pin
(1)
TMR0 Clock Input
QD
Q
CK
QD
Q
CK
EN
QD
EN
RD LATA
WR LATA
or
PORTA
Note 1: I/O pins have protection diodes to V
DD and VSS.
Data
Bus
QD
Q
CK
QD
Q
CK
QD
EN
P
N
WR LATA
WR
Data Latch
TRIS Latch
RD TRISA
RD PORTA
V
SS
VDD
I/O pin
(1)
Note 1: I/O pins have protection diodes to VDD and VSS.
or
PORTA
RD LATA
ECRA6 or
Data Bus
ECRA6 or
Enable
Data Bus
TTL
Input
Buffer
RCRA6
RCRA6 Enable
TRISA